Renesas Network Card HS7339KCU01HE User Guide

REJ10B0166-0100  
SuperH Family E10A-USB Emulator  
Additional Document for User’s Manual  
Supplementary Information on Using the SH7339  
Renesas Microcomputer Development Environment System  
SuperH Family  
E10A-USB for SH7339 HS7339KCU01HE  
Rev.1.00  
 
Revision Date: Dec. 24, 2004  
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Contents  
Section 1 Connecting the Emulator with the User System................................1  
1.1 Components of the Emulator ............................................................................................1  
1.2 Connecting the Emulator with the User System ...............................................................2  
1.3 Installing the H-UDI Port Connector on the User System ................................................3  
1.4 Pin Assignments of the H-UDI Port Connector................................................................3  
1.5 Recommended Circuit between the H-UDI Port Connector and the MPU.......................6  
1.5.1 Recommended Circuit (36-Pin Type)..................................................................6  
1.5.2 Recommended Circuit (14-Pin Type)..................................................................9  
Section 2 Software Specifications when Using the SH7339 .............................11  
2.1 Differences between the SH7339 and the Emulator .........................................................11  
2.2 Specific Functions for the Emulator when Using the SH7339..........................................16  
2.2.1 Break Condition Functions ..................................................................................16  
2.2.2 Trace Functions....................................................................................................17  
2.2.3 Notes on Using the JTAG (H-UDI) Clock (TCK) and AUD Clock (AUDCK)...23  
2.2.4 Notes on Setting the [Breakpoint] Dialog Box ....................................................23  
2.2.5 Notes on Setting the [Break Condition] Dialog Box and  
the BREAKCONDITION_ SET Command ........................................................25  
2.2.6 Note on Setting the UBC_MODE Command ......................................................25  
2.2.7 Performance Measurement Function ...................................................................26  
2.2.8 Notes on U Standby State ....................................................................................31  
i
 
ii  
 
Section 1 Connecting the Emulator with the User System  
1.1  
Components of the Emulator  
Table 1.1 lists the components of the emulator.  
Table 1.1 Components of the Emulator  
Classi-  
fication Component  
Quan-  
tity  
Appearance  
Remarks  
Hard-  
ware  
Emulator box  
1
HS0005KCU01H:  
Depth: 65.0 mm, Width: 97.0 mm,  
Height: 20.0 mm, Mass: 72.9 g  
or  
HS0005KCU02H:  
Depth: 65.0 mm, Width: 97.0 mm,  
Height: 20.0 mm, Mass: 73.7 g  
User system interface  
cable  
1
1
14-pin type:  
Length: 20 cm, Mass: 33.1 g  
User system interface  
cable  
36-pin type:  
Length: 20 cm, Mass: 49.2 g  
(only for HS0005KCU02H)  
USB cable  
1
Length: 150 cm, Mass: 50.6 g  
Soft-  
ware  
SH7339 E10A-USB  
emulator setup  
1
HS0005KCU01SR,  
program,  
SuperHTM Family  
E10A-USB Emulator  
User’s Manual,  
HS0005KCU01HJ,  
HS0005KCU01HE,  
Supplementary  
HS7339KCU01HJ,  
HS7339KCU01HE,  
Information on Using  
the SH7339*, and  
Test program manual  
for HS0005KCU01H  
and HS0005KCU02H  
HS0005TM01HJ, and  
HS0005TM01HE  
(provided on a CD-R)  
Note: Additional document for the MPUs supported by the emulator is included. Check the target  
MPU and refer to its additional document.  
1
 
1.2  
Connecting the Emulator with the User System  
To connect the E10A-USB emulator (hereinafter referred to as the emulator), the H-UDI port  
connector must be installed on the user system to connect the user system interface cable. When  
designing the user system, refer to the recommended circuit between the H-UDI port connector  
and the MPU. In addition, read the E10A-USB emulator user's manual and hardware manual for  
the related device.  
Table 1.2 shows the type number of the emulator, the corresponding connector type, and the use of  
AUD function.  
Table 1.2 Type Number, AUD Function, and Connector Type  
Type Number  
Connector  
AUD Function  
Available  
HS0005KCU02H  
HS0005KCU01H  
36-pin connector  
14-pin connector  
Not available  
The H-UDI port connector has the 36-pin and 14-pin types as described below. Use them  
according to the purpose of the usage.  
1. 36-pin type (with AUD function)  
The AUD trace function is supported. A large amount of trace information can be acquired in  
realtime. The window trace function is also supported for acquiring memory access in the  
specified range (memory access address or memory access data) by tracing.  
2. 14-pin type (without AUD function)  
The AUD trace function cannot be used because only the H-UDI function is supported. For  
tracing, only the internal trace function is supported. Since the 14-pin type connector is  
smaller than the 36-pin type (1/2.5), the area where the connector is installed on the user  
system can be reduced.  
2
 
1.3  
Installing the H-UDI Port Connector on the User System  
Table 1.3 shows the recommended H-UDI port connectors for the emulator.  
Table 1.3 Recommended H-UDI Port Connectors  
Connector  
Type Number  
Manufacturer  
Specifications  
Screw type  
36-pin connector DX10M-36S  
Hirose Electric Co., Ltd.  
DX10M-36SE,  
Lock-pin type  
DX10G1M-36SE  
14-pin connector 2514-6002  
Minnesota Mining &  
Manufacturing Ltd.  
14-pin straight type  
Note: When designing the 36-pin connector layout on the user board, do not connect any  
components under the H-UDI connector. When designing the 14-pin connector layout on  
the user board, do not place any components within 3 mm of the H-UDI port connector.  
1.4  
Pin Assignments of the H-UDI Port Connector  
Figures 1.1 and 1.2 show the pin assignments of the 36-pin and 14-pin H-UDI port connectors,  
respectively.  
Note: Note that the pin number assignments of the H-UDI port connector shown on the  
following pages differ from those of the connector manufacturer. For the pin number  
assignments of the SH7339, refer to the hardware manual.  
3
 
Pin  
No.  
Pin  
No.  
Input/  
Output  
Input  
Input/  
Output  
SH7339  
Pin No.  
SH7339  
Pin No.  
*1  
*1  
Signal  
Signal  
Note  
Note  
AUDCK  
Output  
H2  
19 TMS  
20 GND  
21 /TRST  
1
2
3
4
5
6
K3  
GND  
*2  
*4  
Output  
Input  
AUDATA0  
GND  
J4  
L2  
K4  
L3  
N2  
22  
23  
24  
(GND)  
Output  
Output  
K2  
J3  
Input  
TDI  
AUDATA1  
GND  
GND  
TDO  
GND  
Output  
Output  
Output  
Output  
Output  
AUDATA2  
GND  
25  
26  
7
8
*2  
Output  
Output  
27  
28  
29  
30  
AUDATA3  
GND  
M3  
P2  
9
/ASEBRKAK  
GND  
10  
11  
*2  
/AUDSYNC  
GND  
UVCC  
12  
GND  
*2  
31 /RESETP  
F5  
13 NC  
User reset  
32  
33  
34  
GND  
GND  
GND  
14  
15  
16  
GND  
*3  
*2  
Output  
Input  
H3  
J2  
/CA  
GND  
35 NC  
17 TCK  
18  
Notes: 1. Input to or output from the user system.  
2. The slash (/) means that the signal is active-low.  
36  
GND  
GND  
3. The emulator monitors the GND signal of the user system and detects whether or not  
the user system is connected.  
4. The /ASEMD0 pin must be 0 when the emulator is connected and 1 when the emulator is  
not connected, respectively.  
(1) When the emulator is used: /ASEMD0 = 0  
(2) When the emulator is not used: /ASEMD0 = 1  
To allow the /ASEMD0 pin to be GND by connecting the user system interface cable,  
connect pin 22 directly to the /ASEMD0 pin. Do not ground the pin.  
Edge of the board  
(connected to the connector)  
H-UDI port connector  
(top view)  
4
+0.2  
0
2
+0.1  
0
36  
φ
2.8  
φ
0.7  
(Pin 1 mark)  
3
35  
1
1.27  
M2.6 x 0.45  
4.09  
21.59  
37.61  
43.51  
: Pattern inhibited area  
H-UDI port connector (top view)  
H-UDI port connector (front view)  
Unit: mm  
Figure 1.1 Pin Assignments of the H-UDI Port Connector (36 Pins)  
4
 
Input/  
Output*1  
SH7339  
Pin No.  
Pin No. Signal  
Note  
Input  
J2  
1
2
3
4
5
6
7
8
9
11  
TCK  
*2  
*2  
L2  
L3  
N2  
K3  
K4  
F5  
H3  
/TRST  
TDO  
Input  
Output  
Output  
Input  
/ASEBRKAK  
TMS  
TDI  
Input  
*2  
*2  
User reset  
/RESETP  
/CA  
Output  
Output  
*4  
(GND)  
UVCC  
Output  
Output  
10, 12, GND  
and 13  
*3  
14  
GND  
Notes: 1. Input to or output from the user system.  
2. The slash (/) means that the signal is active-low.  
3. The emulator monitors the GND signal of the user system and detects whether or not  
the user system is connected.  
4. The /ASEMD0 pin must be 0 when the emulator is connected and 1 when the emulator is  
not connected, respectively.  
(1) When the emulator is used: /ASEMD0 = 0  
(2) When the emulator is not used: /ASEMD0 = 1  
To allow the /ASEMD0 pin to be GND by connecting the user system interface cable,  
connect pin 22 directly to the /ASEMD0 pin. Do not ground the pin.  
Pin 1 mark  
H-UDI port connector (top view)  
25.0  
23.0  
6 x 2.54 = 15.24  
H-UDI port connector  
(top view)  
(2.54)  
Pin 8  
Pin 1  
Pin 14  
Pin 7  
0.45  
Unit: mm  
Pin 1 mark  
Figure 1.2 Pin Assignments of the H-UDI Port Connector (14 Pins)  
5
 
1.5  
Recommended Circuit between the H-UDI Port Connector and the  
MPU  
1.5.1  
Recommended Circuit (36-Pin Type)  
Figure 1.3 shows a recommended circuit for connection between the H-UDI and AUD port  
connectors (36 pins) and the MPU when the emulator is in use.  
Notes: 1. Do not connect anything to the N.C. pins of the H-UDI port connector.  
2. The /ASEMD0 pin must be 0 when the emulator is connected and 1 when the  
emulator is not connected, respectively.  
(1) When the emulator is used: /ASEMD0 = 0  
(2) When the emulator is not used: /ASEMD0 = 1  
Figure 1.3 shows an example of a circuit that allow the /ASEMD0 pin to be GND (0)  
whenever the emulator is connected by using the user system interface cable.  
When the /ASEMD0 pin is changed by switches, etc., ground pin 22. Do not connect  
this pin to the /ASEMD0 pin.  
3. When a network resistance is used for pull-up, it may be affected by a noise. Separate  
TCK from other resistances.  
4. The /CA signal in the user system is input to the /CA pin of the MPU. Connect this  
signal to the H-UDI port connector as the output from the user system.  
5. When the emulator is used, the /CA pin must be pulled up by a resistance of several  
kilo-ohms whether the U-standby function is used or not.  
6. The /TRST pin must be at the low level for a certain period when the power is  
supplied whether the H-UDI is used or not. Reduce the power supplied to the /TRST  
pin by pulling the pin up by a resistance of several kilo-ohms and setting HIZB8 = 0  
in the HIZCRB register after a reset.  
7. The pattern between the H-UDI port connector and the MPU must be as short as  
possible. Do not connect the signal lines to other components on the board.  
8. Since the H-UDI and the AUD of the MPU operate with the VccQH, supply only the  
VccQH to the UVCC pin. Make the emulator’s switch settings so that the VccQH will  
be supplied (SW2 = 1 and SW3 = 1) (as shown in figure 1.3).  
9. The resistance values shown in the figure are recommended.  
10. For the pin processing in cases where the emulator is not used, refer to the hardware  
manual of the related MPU.  
11. Either 3.0 V or 1.8 V can be selected as VccQ for the /CA pin or the /RESETP pin due  
to the MPU specifications. These pins must be pulled up by the voltage level of VccQ.  
In addition, when VccQ is selected as 1.8 V, VccQ is boosted because the lower limit  
of the emulator’s UVCC or VccQH voltage is 2.5 V. However, it does not affect  
MPU’s operation.  
6
 
12. For the AUDCK pin, guard the pattern between the H-UDI port connector and the  
MPU at GND level.  
7
 
When the circuit is connected as shown in figure 1.3, the switches of the emulator are set as SW2  
= 1 and SW3 = 1. For details, refer to section 3.8, Setting the DIP Switches, in the Debugger Part  
of the SuperHTM Family E10A-USB Emulator User’s Manual.  
VccQH = 3.0-V I/O power supply  
VccQ = 3.0-V/1.8-V I/O power supply  
All pulled-up at 4.7 kor more  
VccQ VccQ  
VccQH  
VccQH  
VccQH VccQH  
VccQH  
VccQH  
H-UDI port connector  
(36-pin type)  
SH7339  
AUDCK  
1
2
GND  
GND  
GND  
AUDCK  
AUDATA0  
AUDATA1  
4
3
5
AUDATA0  
AUDATA1  
AUDATA2  
6
8
7
GND AUDATA2  
GND AUDATA3  
9
10  
12  
AUDATA3  
AUDSYNC  
11  
GND  
GND  
GND  
GND  
GND  
(GND)  
GND  
GND  
AUDSYNC  
N.C.  
13  
15  
17  
19  
21  
14  
16  
18  
20  
CA  
TCK  
TMS  
TCK  
TMS  
22  
TRST  
TRST  
TDI  
23  
25  
27  
24  
26  
28  
TDI  
TDO  
TDO  
GND  
GND  
GND  
GND  
GND  
ASEBRKAK  
UVCC  
ASEBRKAK  
CA  
29  
31  
33  
35  
30  
32  
34  
36  
RESET  
RESETP  
GND  
N.C.  
1 kΩ  
ASEMD0  
Reset signal  
/CA signal  
User system  
Figure 1.3 Recommended Circuit for Connection between the H-UDI Port Connector and  
MPU when the Emulator is in Use (36-Pin Type UVCC Connected)  
8
 
1.5.2  
Recommended Circuit (14-Pin Type)  
Figure 1.4 shows a recommended circuit for connection between the H-UDI and AUD port  
connectors (14 pins) and the MPU when the emulator is in use.  
Notes: 1. Do not connect anything to the N.C. pins of the H-UDI port connector.  
2. The /ASEMD0 pin must be 0 when the emulator is connected and 1 when the  
emulator is not connected, respectively.  
(1) When the emulator is used: /ASEMD0 = 0  
(2) When the emulator is not used: /ASEMD0 = 1  
Figure 1.4 shows an example of a circuit that allow the /ASEMD0 pin to be GND (0)  
whenever the emulator is connected by using the user system interface cable.  
When the /ASEMD0 pin is changed by switches, etc., ground pin 9. Do not connect  
this pin to the /ASEMD0 pin.  
3. When a network resistance is used for pull-up, it may be affected by a noise. Separate  
TCK from other resistances.  
4. The /CA signal in the user system is input to the /CA pin of the MPU. Connect this  
signal to the H-UDI port connector as the output from the user system.  
5. When the emulator is used, the /CA pin must be pulled up by a resistance of several  
kilo-ohms whether the U-standby function is used or not.  
6. The /TRST pin must be at the low level for a certain period when the power is  
supplied whether the H-UDI is used or not. Reduce the power supplied to the /TRST  
pin by pulling the pin up by a resistance of several kilo-ohms and setting HIZB8 = 0  
in the HIZCRB register after a reset.  
7. The pattern between the H-UDI port connector and the MPU must be as short as  
possible. Do not connect the signal lines to other components on the board.  
8. Since the H-UDI and the AUD of the MPU operate with the VccQH, supply only the  
VccQH to the UVCC pin. Make the emulator’s switch settings so that the VccQH will  
be supplied (SW2 = 1 and SW3 = 1) (as shown in figure 1.4).  
9. The resistance values shown in the figures are recommended.  
10. For the pin processing in cases where the emulator is not used, refer to the hardware  
manual of the related MPU.  
11. Either 3.0 V or 1.8 V can be selected as VccQ for the /CA pin or the /RESETP pin due  
to the MPU specifications. These pins must be pulled up by the voltage level of VccQ.  
In addition, when VccQ is selected as 1.8 V, VccQ is boosted because the lower limit  
of the emulator’s UVCC or VccQH voltage is 2.5 V. However, it does not affect  
MPU’s operation.  
9
 
When the circuit is connected as shown in figure 1.4, the switches of the emulator are set as SW2  
= 1 and SW3 = 1. For details, refer to section 3.8, Setting the DIP Switches, in the Debugger Part  
of the SuperHTM Family E10A-USB Emulator User’s Manual.  
VccQH = 3.0-V I/O power supply  
VccQ = 3.0-V/1.8-V I/O power supply  
All pulled-up at 4.7 kor more  
VccQ  
VccQH  
VccQH  
VccQ  
VccQH VccQH  
VccQH VccQH  
H-UDI port connector  
(14-pin type)  
SH7339  
1
TCK  
TCK  
9
2
3
(GND)  
GND  
TRST  
TRST  
TDO  
10  
TDO  
4
5
6
7
ASEBRKAK  
TMS  
ASEBRKAK  
TMS  
12  
13  
14  
GND  
GND  
GND  
TDI  
TDI  
RESET  
RESETP  
8
CA  
CA  
11  
1 kΩ  
UVCC  
Reset signal  
ASEMD0  
/CA signal  
User system  
Figure 1.4 Recommended Circuit for Connection between the H-UDI Port Connector and  
MPU when the Emulator is in Use (14-Pin Type UVCC Connected)  
10  
 
Section 2 Software Specifications when Using the SH7339  
2.1  
Differences between the SH7339 and the Emulator  
1. When the emulator system is initiated, it initializes the general registers and part of the control  
registers as shown in table 2.1. The initial values of the actual SH7339 registers are undefined.  
When the emulator is initiated from the workspace, a value to be entered is saved in a session.  
Table 2.1 Register Initial Values at Emulator Link Up  
Register  
R0 to R14  
R15 (SP)  
R0_BANK to R7_BANK  
PC  
Emulator at Link Up  
H'00000000  
H'A0000000  
H'00000000  
H'A0000000  
H'700000F0  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'000000F0  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
H'00000000  
SR  
GBR  
VBR  
MACH  
MACL  
PR  
SPC  
SSR  
RS  
RE  
MOD  
A0G, A1G  
A0, A1  
X0, X1  
Y0, Y1  
M0, M1  
DSR  
2. The emulator uses the H-UDI; do not access the H-UDI.  
11  
 
3. Low-Power States (Sleep, Software Standby, Module Standby, and U Standby)  
For low-power consumption, the SH7339 has sleep, software standby, module standby, and U  
standby states.  
The sleep, software standby, and module standby states are switched using the SLEEP  
instruction. When the emulator is used, only the sleep state can be cleared with either the  
normal clearing function or with the [STOP] button, and a break will occur. For the U standby  
state, refer to section 2.2.8, Notes on U Standby State.  
Note: The memory must not be accessed or modified in sleep state.  
4. Reset Signals  
The SH7339 reset signals are only valid during emulation started with clicking the GO or  
STEP-type button. If these signals are enabled on the user system in command input wait  
state, they are not sent to the SH7339.  
Note: Do not break the user program when the /RESETP, /BREQ, or /WAIT signal is being low.  
A TIMEOUT error will occur. If the /BREQ or /WAIT signal is fixed to low during  
break, a TIMEOUT error will occur at memory access.  
5. Direct Memory Access Controller (DMAC)  
The DMAC operates even when the emulator is used. When a data transfer request is  
generated, the DMAC executes DMA transfer.  
6. Memory Access during User Program Execution  
When a memory is accessed from the memory window, etc. during user program execution,  
the user program is resumed after it has stopped in the E10A-USB emulator to access the  
memory. Therefore, realtime emulation cannot be performed.  
The stopping time of the user program is as follows:  
Environment:  
Host computer: 800 MHz (Pentium® III)  
SH7339: 60 MHz (CPU clock)  
JTAG clock: 10 MHz (TCK clock)  
When a one-byte memory is read from the command-line window, the stopping time will be  
about 45 ms.  
7. Memory Access during User Program Break  
The emulator can download the program for the flash memory area (for details, refer to section  
6.22, Download Function to the Flash Memory Area, in the Debugger Part of the SuperHTM  
Family E10A-USB Emulator User’s Manual). Other memory write operations are enabled for  
the RAM area. Therefore, an operation such as memory write or BREAKPOINT should be set  
only for the RAM area.  
12  
 
8. Cache Operation during User Program Break  
When cache is enabled, the emulator accesses the memory by the following methods:  
At memory write: Writes through the cache, then writes to the memory.  
At memory read: Does not change the cache write mode that has been set.  
Therefore, when memory read or write is performed during user program break, the cache state  
will be changed.  
9. Port G  
The AUD and H-UDI pins are multiplexed as shown in table 2.2.  
Table 2.2 Multiplexed Functions  
Port  
G
Function 1  
Function 2  
PTG5 input/output (port) *1  
PTG4 input/output (port) *2  
PTG3 input/output (port) *2  
PTG2 input/output (port) *2  
PTG1 input/output (port) *2  
PTG0 input/output (port) *2  
/ASEBRKAK (H-UDI)  
/AUDSYNC (AUD)  
AUDATA3 (AUD)  
AUDATA2 (AUD)  
AUDATA1 (AUD)  
AUDATA0 (AUD)  
G
G
G
G
G
Notes: 1. PTG5 cannot be used when the emulator is used.  
2. Function 1 can be used when the AUD pins of the device are not connected to the  
emulator.  
10. UBC  
When [User] is specified in the [UBC mode] list box in the [Configuration] dialog box, the  
UBC can be used in the user program.  
Do not use the UBC in the user program as it is used by the emulator when [EML] is specified  
in the [UBC mode] list box in the [Configuration] dialog box.  
11. MFI Boot Mode  
When the MFI boot mode is used, be sure to allocate the boot program from the top of  
MFRAM.  
12. Using RWDT  
At power-on reset, the operation of RWDT is enabled. When RWDT is not used, be sure to  
disable the operation of RWDT at the top of the user-reset program.  
13  
 
13. Memory Access during Break  
In the enabled MMU, when a memory is accessed and a TLB error occurs during break, it can  
be selected whether the TLB exception is controlled or the program jumps to the user  
exception handler in [TLB Mode] in the [Configuration] dialog box. When [TLB miss  
exception is enable] is selected, a “Communication Timeout error” will occur if the TLB  
exception handler does not operate correctly. When [TLB miss exception is disable] is  
selected, the program does not jump to the TLB exception handler even if a TLB exception  
occurs. Therefore, if the TLB exception handler does not operate correctly, a “Communication  
Timeout error” will not occur but the memory contents may not be correctly displayed.  
14. Loading Sessions  
Information in [JTAG clock] of the [Configuration] dialog box cannot be recovered by loading  
sessions. Thus the TCK value will be as follows:  
When HS0005KCU01H or HS0005KCU02H is used: TCK = 0.625 MHz  
15. [IO] window  
Display and modification  
Do not change values of the User Break Controller because it is used by the emulator.  
For each watchdog timer and RCLK watchdog timer register, there are two registers to be  
separately used for write and read operations.  
Table 2.3 Watchdog Timer Register  
Register Name  
WTCSR(W)  
WTCNT(W)  
WTCSR(R)  
Usage  
Write  
Write  
Read  
Read  
Write  
Write  
Read  
Read  
Register  
Watchdog timer control/status register  
Watchdog timer counter  
Watchdog timer control/status register  
Watchdog timer counter  
WTCNT(R)  
RWTCSR(W)  
RWTCNT(W)  
RWTCSR(R)  
RWTCNT(R)  
RCLK watchdog timer control/status register  
RCLK watchdog timer counter  
RCLK watchdog timer control/status register  
RCLK watchdog timer counter  
The watchdog timer operates only when the user program is executed. Do not change the  
value of the frequency change register in the [IO] window or [Memory] window.  
14  
 
The internal I/O registers can be accessed from the [IO] window. However, note the  
following when accessing the SDMR register of the bus-state controller. Before accessing  
the SDMR register, specify addresses to be accessed in the I/O-register definition file  
(SH7339.IO) and then activate the HEW. After the I/O-register definition file is created,  
the MPU’s specifications may be changed. If each I/O register in the I/O-register  
definition file differs from addresses described in the hardware manual, change the I/O-  
register definition file according to the description in the hardware manual. The I/O-  
register definition file can be customized depending on its format. Note that, however, the  
E10A emulator does not support the bit-field function.  
Verify  
In the [IO] window, the verify function of the input value is disabled.  
16. Illegal Instructions  
If illegal instructions are executed by STEP-type commands, the emulator cannot go to the  
next program counter.  
15  
 
2.2  
Specific Functions for the Emulator when Using the SH7339  
In the SH7339, a reset must be input when the emulator is activated. Do not use the activation  
method described in step 12 for section 3.11 in the Debugger Part of the SuperHTM Family  
E10A-USB Emulator User's Manual.  
2.2.1  
Break Condition Functions  
In addition to BREAKPOINT functions, the emulator has Break Condition functions. Three types  
of conditions can be set under Break Condition 1, 2, 3. Table 2.4 lists these conditions of Break  
Condition.  
Table 2.4 Types of Break Conditions  
Break Condition Type  
Description  
Address bus condition (Address)  
Breaks when the SH7339 address bus value or the program  
counter value matches the specified value.  
Data bus condition (Data)  
Breaks when the SH7339 data bus value matches the  
specified value. Byte, word, or longword can be specified as  
the access data size.  
X-Bus or Y-Bus condition (Address Breaks when the X-Bus or Y-Bus address bus or data bus  
and data)  
matches the specified value.  
Bus state condition  
(Bus State)  
There are two bus state condition settings:  
Read/Write condition: Breaks when the SH7339 RD or  
RDWR signal level matches the specified condition.  
Bus state condition: Breaks when the operating state in an  
SH7339 bus cycle matches the specified condition.  
Types of buses that can be specified are listed below.  
L-bus (CPU-ALL): Indicates an instruction fetch and data  
access, including a hit to the cache memory.  
L-bus (CPU-Data): Indicates a data access by the CPU,  
including a hit to the cache memory.  
I-bus (CPU.DMA): Indicates a CPU cycle when the  
cache memory is not hit, and a data access by the  
DMA.  
Internal I/O break condition  
LDTLB instruction break condition  
Count  
Breaks when the SH7339 accesses the internal I/O.  
Breaks when the SH7339 executes the LDTLB instruction.  
Breaks when the conditions set are satisfied the specified  
number of times.  
16  
 
Note: When U-RAM or X/Y-RAM is accessed from the P0 space, the I-bus must be selected,  
and when accessed from the P2 space, the L-bus must be selected. When cache fill cycle is  
acquired, the I-bus must be selected.  
Table 2.5 lists the combinations of conditions that can be set under Break Condition 1, 2, 3.  
Table 2.5 Dialog Boxes for Setting Break Conditions  
Type  
Bus  
Address Data  
Bus Bus  
Condition Condition Condition (Bus  
State  
Condition Count  
ASID  
Internal LDTLB  
Instruction  
Break Break  
Condition I/O  
(Count)  
Dialog Box  
(Address) (Data)  
(ASID)  
Status)  
[Break Condition 1]  
dialog box  
O
O
X
O
O
O
O
X
X
[Break Condition 2]  
dialog box  
X
X
O
O
X
X
X
X
[Break Condition 3]  
dialog box  
X
X
O
O
Notes: 1. O: Can be set in the dialog box.  
X: Cannot be set in the dialog box.  
2. For Break Condition 2, X-bus and Y-bus conditions cannot be specified.  
2.2.2  
Trace Functions  
The emulator supports the trace functions listed in table 2.6.  
Table 2.6 Trace Functions  
Function  
Internal Trace  
AUD Trace  
Supported  
Supported  
Supported  
Branch trace  
Supported (eight branches)  
Not supported  
Range memory access trace  
Software trace  
Not supported  
17  
 
Table 2.7 shows the type numbers that the AUD function can be used.  
Table 2.7 Type Number and AUD Function  
Type Number  
AUD Function  
Not supported  
Supported  
HS0005KCU01H  
HS0005KCU02H  
AUD Trace Functions: This function is operational when the AUD pin of the device is  
connected to the emulator. Table 2.8 shows the AUD trace acquisition mode that can be set in  
each trace function.  
Table 2.8 AUD Trace Acquisition Mode  
Type  
Mode  
Description  
Continuous  
trace occurs  
Realtime trace  
When the next branch occurs while the trace information is  
being output, all the information may not be output. The user  
program can be executed in realtime, but some trace  
information will be lost.  
Non realtime trace When the next branch occurs while the trace information is  
being output, the CPU stops operations until the information  
is output. The user program is not executed in realtime.  
Trace buffer  
full  
Trace continue  
This function overwrites the latest trace information to store  
the oldest trace information.  
Trace stop  
After the trace buffer becomes full, the trace information is no  
longer acquired. The user program is continuously executed.  
18  
 
To set the AUD trace acquisition mode, click the [Trace] window with the right mouse button and  
select [Setting] from the pop-up menu to display the [Acquisition] dialog box. The AUD trace  
acquisition mode can be set in the [AUD mode1] or [AUD mode2] group box in the [Trace mode]  
page of the [Acquisition] dialog box.  
Figure 2.1 [Trace mode] Page  
When the AUD trace function is used, select the [AUD function] radio button in the [Trace type]  
group box of the [Trace mode] page.  
19  
 
(a) Branch Trace Function  
The branch source and destination addresses and their source lines are displayed.  
Branch trace can be acquired by selecting the [Branch trace] check box in the [AUD function]  
group box of the [Trace mode] page.  
The branch type can be selected in the [AUD Branch trace] page.  
Figure 2.2 [AUD Branch trace] Page  
(b) Window Trace Function  
Memory access in the specified range can be acquired by trace.  
Two memory ranges can be specified for channels A and B. The read, write, or read/write  
cycle can be selected as the bus cycle for trace acquisition.  
[Setting Method]  
(i) Select the [Channel A] and [Channel B] check boxes in the [AUD function] group  
box of the [Trace mode] page. Each channel will become valid.  
(ii) Open the [Window trace] page and specify the bus cycle and memory range that are to be  
set for each channel.  
20  
 
Figure 2.3 [Window trace] Page  
Notes: 1. When the [L-bus] or [I(M)-bus] radio button is selected, the bus cycles listed below  
will be traced. The [I-bus] and [M-bus] radio buttons are only available when the  
[I(M)-bus] radio button has been selected.  
L-bus: A bus cycle on the L-bus generated by the CPU is acquired. A bus cycle is  
also acquired when the cache has been hit.  
I-bus: A bus cycle on the I-bus generated by the CPU or DMA is acquired. A bus  
cycle is not acquired when the cache has been hit.  
M-bus: A bus cycle on the M-bus generated by the CPU is acquired. A bus cycle is  
not acquired when the cache has been hit.  
It is not possible to acquire trace information on accesses to I-bus and M-bus at the  
same time.  
The address information acquired by the I-bus/M-bus is 28 bits and the upper 4 bits are  
displayed as ‘*’. The source cannot be displayed in the [Trace] window.  
21  
 
When U-RAM or X/Y-RAM is accessed from the P0 space, the I-bus must be selected,  
and when accessed from the P2 space, the L-bus must be selected. When a cache fill  
cycle is acquired, I-bus must be selected.  
2. Address setting when X/Y-bus is selected  
To trace both the X/Y-bus when the X/Y-bus is accessed at the same time, the X-bus  
condition must be set in channel A, and the Y-bus condition must be set in channel B.  
(c) Software Trace Function  
Note: This function can be supported with SHC/C++ compiler (manufactured by Renesas  
Technology Corp.; including OEM and bundle products) V7.0 or later.  
When a specific instruction is executed, the PC value at execution and the contents of one  
general register are acquired by trace. Describe the Trace(x) function (x is a variable name) to  
be compiled and linked beforehand. For details, refer to the SHC manual.  
When the load module is downloaded on the target system and is executed while a software  
trace function is valid, the PC value that has executed the Trace(x) function, the general  
register value for x, and the source lines are displayed.  
To activate the software trace function, select the [Software trace] check box in the [AUD  
function] group box of the [Trace mode] page.  
Notes on AUD Trace:  
1. When the trace display is performed during user program execution, the mnemonics, operands,  
or source is not displayed.  
2. The AUD trace function outputs the differences between newly output branch source addresses  
and previously output branch source addresses. The window trace function outputs the  
differences between newly output addresses and previously output addresses. If the previous  
branch source address is the same as the upper 16 bits, the lower 16 bits are output. If it  
matches the upper 24 bits, the lower 8 bits are output. If it matches the upper 28 bits, the lower  
4 bits are output.  
The emulator regenerates the 32-bit address from these differences and displays it in the  
[Trace] window. If the emulator cannot display the 32-bit address, it displays the difference  
from the previously displayed 32-bit address.  
3. If the 32-bit address cannot be displayed, the source line is not displayed.  
4. In the emulator, when multiple loops are performed to reduce the number of AUD trace  
displays, only the IP counts up.  
5. In the emulator, the maximum number of trace displays is 65534 lines (32767 branches).  
However, the maximum number of trace displays differs according to the AUD trace  
information to be output. Therefore, the above pointers cannot be always acquired.  
6. The AUD trace acquisition is not available when [User] is selected in the [UBC mode] list box  
of the [Configuration] dialog box. In this case, close the [Trace] window.  
22  
 
7. Do not use the AUD full-trace mode for the VIO function.  
8. If a completion-type exception occurs during exception branch acquisition, the next address to  
the address in which an exception occurs is acquired.  
Internal Trace Function: This function is activated by selecting the [Internal trace] radio button  
in the [Trace type] group box of the [Trace mode] page. This function traces and displays the  
branch instructions. The branch source address and branch destination address for the eight latest  
branch instructions are displayed. See figure 2.1, [Trace mode] Page.  
Notes: 1. If an interrupt is generated at the program execution start or end, including a step  
operation, the emulator address may be acquired. In such a case, the following  
message will be displayed. Ignore this address because it is not a user program  
address.  
*** EML ***  
2. If a completion-type exception occurs during exception branch acquisition, the next  
address to the address in which an exception occurs is acquired.  
3. Trace information cannot be acquired for the following branch instructions:  
The BF and BT instructions whose displacement value is 0  
Branch to H'A0000000 by reset  
4. The internal trace acquisition is not available when [User] is selected in the [UBC  
mode] list box of the [Configuration] dialog box. In this case, close the [Trace]  
window.  
2.2.3  
Notes on Using the JTAG (H-UDI) Clock (TCK) and AUD Clock (AUDCK)  
1. Set the JTAG clock (TCK) frequency to lower than the frequency of the SH7339 peripheral  
module clock (CKP).  
2. Set the AUD clock (AUDCK) frequency to 50 MHz or lower. If the frequency is higher than  
50 MHz, the emulator will not operate normally.  
2.2.4  
Notes on Setting the [Breakpoint] Dialog Box  
1. When an odd address is set, the next lowest even address is used.  
2. A BREAKPOINT is accomplished by replacing instructions of the specified address.  
Accordingly, it can be set only to the internal RAM area. However, a BREAKPOINT cannot  
be set to the following addresses:  
An area other than CS0 to CS6 and the internal RAM  
An instruction in which Break Condition 2 is satisfied  
A slot instruction of a delayed branch instruction  
An area that can be only read by MMU  
3. During step operation, BREAKPOINTs are disabled.  
23  
 
4. Conditions set at Break Condition 2 are disabled when an instruction to which a  
BREAKPOINT has been set is executed. Do not set a BREAKPOINT to an instruction in  
which Break Condition 2 is satisfied.  
5. When execution resumes from the address where a BREAKPOINT is specified, single-step  
operation is performed at the address before execution resumes. Therefore, realtime operation  
cannot be performed.  
6. When a BREAKPOINT is set to the slot instruction of a delayed branch instruction, the PC  
value becomes an illegal value. Accordingly, do not set a BREAKPOINT to the slot  
instruction of a delayed branch instruction.  
7. When a BREAKPOINT is set to the cacheable area, the cache block containing the  
BREAKPOINT address is filled immediately before and after user program execution.  
8. Note on DSP repeat loop:  
A BREAKPOINT is equal to a branch instruction. In some DSP repeat loops, branch  
instructions cannot be set. For these cases, do not set BREAKPOINTs. Refer to the hardware  
manual for details.  
9. When the [Normal] option is selected in the [Memory area] group box in the [General] page of  
the [Configuration] dialog box, a BREAKPOINT is set to a physical address or a virtual  
address according to the SH7339 MMU status during command input when the VPMAP_SET  
command setting is disabled. The ASID value of the SH7339 PTEH register during command  
input is used. When VPMAP_SET command setting is enabled, a BREAKPOINT is set to a  
physical address into which address translation is made according to the VP_MAP table.  
However, for addresses out of the range of the VP_MAP table, the address to which a  
BREAKPOINT is set depends on the SH7339 MMU status during command input. Even  
when the VP_MAP table is modified after BREAKPOINT setting, the address translated when  
the BREAKPOINT is set valid.  
10. When the [Physical] option is selected in the [Memory area] group box in the [General] page  
of the [Configuration] dialog box, a BREAKPOINT is set to a physical address. A  
BREAKPOINT is set after disabling the SH7339 MMU upon program execution. After  
setting, the MMU is returned to the original state. When a break occurs at the corresponding  
virtual address, the cause of termination displayed in the status bar and the [Output] window is  
ILLEGAL INSTRUCTION, not BREAKPOINT.  
11. When the [Virtual] option is selected in the [Memory area] group box in the [General] page of  
the [Configuration] dialog box, a BREAKPOINT is set to a virtual address. A BREAKPOINT  
is set after enabling the SH7339 MMU upon program execution. After setting, the MMU is  
returned to the original state. When an ASID value is specified, the BREAKPOINT is set to  
the virtual address corresponding to the ASID value. The emulator sets the BREAKPOINT  
after rewriting the ASID value to the specified value, and returns the ASID value to its original  
value after setting. When no ASID value is specified, the BREAKPOINT is set to a virtual  
address corresponding to the ASID value at command input.  
12. An address (physical address) to which a BREAKPOINT is set is determined when the  
BREAKPOINT is set. Accordingly, even if the VP_MAP table is modified after  
24  
 
BREAKPOINT setting, the BREAKPOINT address remains unchanged. When a  
BREAKPOINT is satisfied with the modified address in the VP_MAP table, the cause of  
termination displayed in the status bar and the [Output] window is ILLEGAL INSTRUCTION,  
not BREAKPOINT.  
13. If an address of a BREAKPOINT cannot be correctly set in the ROM or flash memory area, a  
mark z will be displayed in the [BP] area of the address on the [Source] or [Disassembly]  
window by refreshing the [Memory] window, etc. after Go execution. However, no break will  
occur at this address. When the program halts with the break condition, the mark z  
disappears.  
2.2.5  
Notes on Setting the [Break Condition] Dialog Box and the BREAKCONDITION_  
SET Command  
1. When [Go to cursor], [Step In], [Step Over], or [Step Out] is selected, the settings of Break  
Condition 2 are disabled.  
2. Break Condition 2 is disabled when an instruction to which a BREAKPOINT has been set is  
executed. Accordingly, do not set a BREAKPOINT to an instruction which satisfies Break  
Condition 2.  
3. When a Break Condition is satisfied, emulation may stop after two or more instructions have  
been executed.  
4. If a PC break address condition is set to the slot instruction after a delayed branch instruction,  
user program execution cannot be terminated before the slot instruction execution; execution  
stops before the branch destination instruction.  
5. Break Condition 1,2 is used as the measurement range in the performance measurement  
function when [PA-1 start point] and [PA-1 end point] are displayed on the [Action] part in the  
[Break condition] sheet of the [Eventpoint] window. This applies when the Break Condition is  
displayed with the BREAKCONDITION_DISPLAY command in the command-line function.  
In this case, a break does not occur when Break Condition 1,2 is satisfied.  
6. A break will not occur with the execution counts specified on the execution of the multi-step  
instruction.  
2.2.6  
Note on Setting the UBC_MODE Command  
In the [Configuration] dialog box, if [User] is set while the [UBC mode] list box has been set, the  
STEP-type commands that use Break Condition 2 for implementation cannot be used.  
25  
 
2.2.7  
Performance Measurement Function  
The emulator supports the performance measurement function.  
1. Setting the performance measurement conditions  
To set the performance measurement conditions, use the [Performance Analysis] dialog box  
and the PERFORMANCE_SET command. When any line on the [Performance Analysis]  
window is clicked with the right mouse button, the popup menu is displayed and the  
[Performance Analysis] dialog box is displayed by selecting [Setting].  
Note: For the command line syntax, refer to the online help.  
(a) Specifying the measurement start/end conditions  
The measurement start/end conditions are specified in the [Mode] drop-down list box in the  
[Performance Analysis] dialog box. Three conditions can be set as shown in table 2.9.  
Table 2.9 Conditions Specified in [Mode]  
Item  
Description  
Normal break  
Measurement is started by executing a program and ended when a  
break condition is satisfied.  
Break Condition 1 -> 2  
Break Condition 2 -> 1  
Measurement is started from the satisfaction of the condition set in  
Break Condition 1 to the satisfaction of the condition set in Break  
Condition 2.  
Measurement is started from the satisfaction of the condition set in  
Break Condition 2 to the satisfaction of the condition set in Break  
Condition 1.  
26  
 
Figure 2.4 [Performance Analysis] Dialog Box  
(b) Measurement range  
One of the following ranges can be specified. This depends on the item selected for [Mode] in  
the [Performance Analysis] dialog box.  
1. From the start to the end of the user program execution (When Normal Break is selected  
for [Mode])  
2. From the satisfaction of the condition set in Break Condition 1 to the satisfaction of the  
condition set in Break Condition 2 (When Break condition 1->2 is selected for [Mode])  
3. From the satisfaction of the condition set in Break Condition 2 to the satisfaction of the  
condition set in Break Condition 1 (When Break condition 2->1 is selected for [Mode])  
(In the second and third ranges, [PA-1 start point] and [PA-1 end point] are displayed on the  
[Action] part in the [Break condition] sheet of the [Eventpoint] window.)  
For measurement tolerance,  
The measured value includes tolerance.  
Tolerance will be generated before or after a break.  
For details, see table 2.11.  
27  
 
Notes: 1. When the second and third ranges are specified, execute the user program after the  
measurement start condition is set to Break Condition 1 (or Break Condition 2) and the  
measurement end condition to Break Condition 2 (or Break Condition 1).  
2. Step operation is not possible when Break condition 1->2 or Break condition 2->1 is  
selected for the PERFORMANCE_SET command or in [Mode] of the [Performance  
Analysis] dialog box.  
3. When Break condition 1->2 or Break condition 2->1 is selected in [Mode] of the  
[Performance Analysis] dialog box, specify one or more items for measurement.  
When there is no item, the error message “Measurement item does not have  
specification. Please set up a measurement item.” will be displayed. When no item is  
specified for the PERFORMANCE_SET command, the settings of Break condition 1  
->2 or Break condition 2->1 will be an error.  
(c) Measurement item  
Items are measured with [Channel 1 to 4] in the [Performance Analysis] dialog box.  
Maximum four conditions can be specified at the same time. Table 2.10 shows the  
measurement items (Options in table 2.10 are parameters for <mode> of the  
PERFORMANCE_SET command. They are displayed for CONDITION in the [Performance  
Analysis] window).  
28  
 
Table 2.10 Measurement Item  
Selected Name  
Option  
None  
AC  
Disabled  
Elapsed time  
Number of execution states  
Branch instruction counts  
Number of execution instructions  
DSP-instruction execution counts  
VS  
BT  
I
DI (Devices incorporating the DSP function can  
only be measured.)  
Instruction/data conflict cycle  
Other conflict cycles than instruction/data  
Exception/interrupt counts  
MAC  
OC  
EA  
Data-TLB miss cycle  
MTS (Devices incorporating the MMU function  
can only be measured.)  
Instruction-TLB miss cycle  
ITS (Devices incorporating the MMU function  
can only be measured.)  
Interrupt counts  
INT  
BL1  
MD1  
IC  
Number of BL=1 instructions  
Number of MD=1 instructions  
Instruction cache-miss counts  
Data cache-miss counts  
Instruction fetch stall  
DC  
IF  
Data access stall  
DA  
Instruction cache-miss stall  
Data cache-miss stall  
Cacheable access stall  
X/Y-RAM access stall  
ICS  
DCS  
CS  
XYS (Devices incorporating the X/Y memory  
can only be measured.)  
URAM access stall  
US (Devices incorporating the U memory can  
only be measured.)  
Instruction/data access stall cycle  
MA  
Other access cycles than instruction/data  
Non-cacheable area access cycle  
Non-cacheable area instruction access cycle  
Non-cacheable area data access cycle  
Cacheable area access cycle  
NMA  
NCC  
NCI  
NCD  
CC  
29  
 
Table 2.10 Measurement Item (cont)  
Selected Name  
Option  
CIC  
Cacheable area instruction access cycle  
Cacheable area data access cycle  
Access counts other than instruction/data  
Non-cacheable area access counts  
Non-cacheable area instruction access counts  
Non-cacheable area data access counts  
Cacheable area access counts  
CDC  
NAM  
NCN  
NCIN  
NCDN  
CN  
Cacheable area instruction access counts  
Cacheable area data access counts  
CIN  
CDN  
Each measurement condition is also counted when conditions in table 2.11 are generated.  
Table 2.11 Performance Measurement Conditions to be Counted  
Measurement Condition  
Notes  
No caching due to the  
settings of TLB cacheable  
bit  
Counted for accessing the cacheable area.  
Cache-on counting  
Accessing the non-cacheable area is counted less than the actual  
number of cycles and counts. Accessing the cacheable, X/Y-RAM,  
and U-RAM areas is counted more than the actual number of cycles  
and counts.  
Branch count  
The counter value is incremented by 2. This means that two cycles  
are valid for one branch.  
Notes: 1. In the non realtime trace mode of the AUD trace, normal counting cannot be performed  
because the generation state of the stall or the execution cycle is changed.  
2. Since the clock source of the counter is the CPU clock, counting also stops when the  
clock halts in the sleep mode.  
2. Displaying the measured result  
The measured result is displayed in the [Performance Analysis] window or the  
PERFORMANCE_ANALYSIS command with hexadecimal (32 bits).  
Note: If a performance counter overflows as a result of measurement, “********” will be  
displayed.  
30  
 
3. Initializing the measured result  
To initialize the measured result, select [Initialize] from the popup menu in the [Performance  
Analysis] window or specify INIT with the PERFORMANCE_ANALYSIS command.  
2.2.8  
Notes on U Standby State  
Controlling Vcc (main) in the U standby state clears settings for peripheral modules in the SH7339  
in which the emulator uses for debugging. Thus the appropriate function must be selected in the  
[Recovery Information] page of the [Configuration] dialog box so that debugging can be  
continued after returning to the U standby state.  
Note: When using the U standby state, be sure to connect the /CA pin to the emulator.  
Table 2.12 lists the items to be selected in the [Recovery Information] page of the [Configuration]  
dialog box.  
Table 2.12 Selected Items in the [Recovery Information] Page  
Selected Item  
Description  
Configuration dialog information  
Resets the information on the [General] page in  
the [Configuration] dialog box.  
Break Condition (UBC)  
Resets the conditions of Break Condition.  
Resets the AUD trace conditions.  
Trace Acquisition Condition (AUD)  
Performance Analysis Condition (PPC)  
Resets the performance conditions.  
31  
 
Figure 2.5 [Recovery Information] Page  
The following shows the procedures recovered from the U standby state.  
1. In the software standby mode, when the /CA pin is asserted, the emulator enters the U standby  
state and the message box shown in figure 2.6 is displayed. To cancel the U standby state, be  
sure to end the message box before asserting /RESETP from the user system.  
2. Turn Vcc (main) off.  
Figure 2.6 Message Box for Entering the U Standby State  
32  
 
3. Assert /RESETP and turn Vcc (main) on.  
4. After the power has been stable, negate the /CA pin.  
5. Negate /RESETP, and the U standby state is cancelled.  
6. Before the program execution is restarted from the reset vector, the E10A-USB debugging  
function, which has been set in the [Recovery Information] page in the [Configuration] dialog  
box, is recovered. During this period, the HEW cannot operate.  
Notes: 1. For entering or canceling the U standby state, refer to the section of low power mode  
in the SH7339 Hardware Manual.  
2. When Vcc (main) is turned on in the U standby state, set the TCK value to less than  
the number of peripheral module clocks and select [Configuration dialog information]  
in the [Recovery Information] page. If this is not selected, the TCK value will be as  
follows:  
When HS0005KCU01H or HS0005KCU02H is used: TCK = 0.625 MHz  
3. After the /CA pin has been negated, if /RESETP is not input for about 30 seconds, a  
timeout error will occur.  
4. Software breakpoints that have recovered from the U standby state remain to be set on  
the memory. However, the contents displayed in the [Breakpoint] sheet of the  
[Eventpoint] window may be different from the actual points when the contents of  
memory are initialized by the control of Vcc (main). In this case, clear all the  
breakpoints and set them again.  
5. In functions for which conditions were not recovered by a selection in [Recovery  
information], the settings made will not be the same as the contents displayed in a  
dialog box or command after the recovery from the U standby state until when the  
user program is halted.  
6. If [User] is set in the [UBC mode] list box in the [Configuration] dialog box, Break  
Condition (UBC) and Trace Acquisition Condition (AUD) cannot be selected.  
7. A noise filter is provided in the emulator to prevent malfunction due to noises of the  
/CA pin. It takes about 70 ns from assertion (negation) of /CA to reflection to the  
emulator. Therefore, set 70 ns or more periods during assertion to negation of /CA.  
8. When the U standby state has been cancelled, before the program execution is  
restarted from the reset vector, the E10A-USB debugging function, which has been set  
in the [Recovery Information] page in the [Configuration] dialog box, is recovered.  
During this period, the HEW cannot operate.  
When the debugging functions except for [Configuration dialog information] are not  
recovered in the [Recovery Information] page, the following waiting time will be  
generated before the user program is reexecuted:  
Frequency: 833 MHz (Pentium® III)  
OS: Windows 2000  
Operating state of SH7339: 20-MHz input clock, 1.25-MHz TCK value  
Waiting time: Approximately 28 ms  
33  
 
34  
 
SuperHTM Family E10A-USB Emulator  
Additional Document for User's Manual  
Supplementary Information on Using the SH7339  
Publication Date: Rev.1.00, December 24, 2004  
Published by:  
Sales Strategic Planning Div.  
Renesas Technology Corp.  
Edited by:  
Technical Documentation & Information Department  
Renesas Kodaira Semiconductor Co., Ltd.  
2004. Renesas Technology Corp., All rights reserved. Printed in Japan.  
 
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan  
RENESAS SALES OFFICES  
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.  
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450 Holger Way, San Jose, CA 95134-1368, U.S.A  
Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501  
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Colophon 2.0  
 
SuperH Family E10A-USB Emulator  
Additional Document for User’s Manual  
 

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